USRP N310 – Simplifying SDR Deployment

USRP N310 – Simplifying SDR Deployment
USRP N310 – Simplifying SDR Deployment

Product Overview

The USRP N310 is a networked software defined radio
that provides reliability and fault-tolerance for deployment
in large scale and distributed wireless systems. This SDR
is one of the highest channel density devices available,
using dual AD9371 RFIC transceivers from Analog

Devices to provide 4 RX and 4 TX channels in a half-wide
RU form factor. Each channel provides up to 100 MHz
of instantaneous bandwidth, and covers an extended
frequency range from 10 MHz to 6 GHz. The baseband
processor uses the Xilinx Zynq-7100 SoC to deliver a
large user programmable FPGA for real-time and low
latency processing and a dual-core ARM CPU for standalone
operation. Support for, 1 GbE, 10 GbE, and Aurora
interfaces over dual SPF+ ports enables high throughput
IQ streaming to a host PC or FPGA co-processor. A flexible
synchronization architecture with support for clock
reference, PPS time reference, external LO input, and
GPSDO enables implementation of high channel count
MIMO systems.

The USRP N310 also introduces a new
generation of USRP software that simplifies control and
management of multiple devices over the network with
the unique capability to remotely administrate tasks such
as debugging, updating software, rebooting, resetting to
factory state, host PC/ARM debugging, and monitoring
system health.

Applications
Wireless Testbeds
High channel density provides a cost effective way of building
large, scalable MIMO testbeds for a variety of advanced
wireless research topics. The remote management features
reduce the effort to deploy in server rooms or across buildings
and test sites.

Remote Radio Heads
The RF front end is highly suitable for prototyping cellular
basestation/UE applications. The USRP N310 can also be
deployed as small cells to serve dense networks such as urban
centers and stadiums.

Features
RF Capabilities
• 4 TX, 4 RX
• Filter banks
• 10 MHz to 6 GHz
• Up to 100 MHz bandwidth per channel
Baseband Processing
• Xilinx Zynq 7100
– Dual-core ARM Cortex-A9 800 MHz
with 1 GB DDR3 RAM
Software
• UHD version 3.11.0.0 or later
• RFNoC
• GNU Radio
• C/C++
• Python
Synchronization
• Clock ref
• PPS time ref
• Trig/PPS out
• GPSDO included
• Ext. TX, RX LO input
Peripherals
• 2 SFP+ (1/10 GbE, Aurora)
• RJ45 (1 GbE)
• 1 Type A USB Host
• 1 Micro-USB (serial console, JTAG)
Power
• 12 V, 7 A DC
Form Factor
• Half-wide RU (357.1 x 211.1 x 43.7
mm)
• 3.13 kg

https://www.ettus.com


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